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authorSam Protsenko <semen.protsenko@linaro.org>2024-08-07 22:14:26 -0500
committerMinkyu Kang <mk7.kang@samsung.com>2024-08-19 16:09:06 +0900
commit8303fd6f5755d32d84c0625165d4707d9e49558a (patch)
tree2546f7750fecec053fe063ef6061df8388a85ebd /drivers/ddr/imx/imx9
parentf6b7f9e7bfba6b9a6587c11e913e4c419482f221 (diff)
mmc: exynos_dw_mmc: Obtain and use CIU clock via CCF API
New Exynos chips should implement clock drivers using CCF framework. In that case corresponding CCF functions can be used to get/set the clock rates. Moreover, already existing get_mmc_clk() and set_mmc_clk() calls are only implemented for CONFIG_CPU_V7A (i.e. ARM32 chips). In case of ARM64 chips that config option is not defined, so build will crash on linking stage, with errors like these: ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_get_sclk': undefined reference to `get_mmc_clk' ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_set_sclk': undefined reference to `set_mmc_clk' Fix that issue by using CCF clocks API on ARM64 platforms for getting and setting the source clock (sclk = SDCLKIN = CIU) rate. To implement this, first extract the existing ARM32 clock control code into helper functions with more generic signatures to abstract getting/setting the sclk rate. Then add CCF clock support to those functions for ARM64 platforms. Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'drivers/ddr/imx/imx9')
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