diff options
| author | Takahiro Kuwano <Takahiro.Kuwano@infineon.com> | 2024-10-15 13:08:31 +0900 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-15 08:57:49 -0600 |
| commit | 6d7a8bf8c03343868d858b1cdb2ab737aabfca66 (patch) | |
| tree | 27a63b607857a471757a5de425d57a66b82b1d52 /drivers/ddr/imx/phy/ddrphy_csr.c | |
| parent | d2061828a4c1b60b44cd2307b6a782ac2efbffbe (diff) | |
mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes
For NOR flashes EC and VID are zeroed out before an erase is issued to
make sure UBI does not mistakenly treat the PEB as used and associate it
with an LEB.
But on some flashes, like the Infineon Semper NOR flash family,
multi-pass page programming is not allowed on the default ECC scheme.
This means zeroing out these magic numbers will result in the flash
throwing a page programming error.
Do not zero out EC and VID for such flashes. A writesize > 1 is an
indication of an ECC-ed flash.
This patch replicates the following upstream linux commit:
f669e74be820 ("ubi: Do not zero out EC and VID on ECC-ed NOR flashes")
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Acked-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/ddr/imx/phy/ddrphy_csr.c')
0 files changed, 0 insertions, 0 deletions