diff options
| author | Dinesh Maniyam <dinesh.maniyam@intel.com> | 2025-02-27 00:18:15 +0800 |
|---|---|---|
| committer | Michael Trimarchi <michael@amarulasolutions.com> | 2025-03-15 10:35:00 +0100 |
| commit | 1ae1e9c55ec42d5176aa5f4a88efc62c63863e43 (patch) | |
| tree | 837d6be997c2da0a76b1c7d49cbebe5244b7168f /drivers/ddr/imx/phy/ddrphy_train.c | |
| parent | 15d6518c942f0da13f9a7ceeadbd925c3317ec8d (diff) | |
dt: nand: add cadence nand dt-bindings
The Cadence NAND is a configurable mtd raw block which
supports multiple options for chipsets, clocking and reset structure, and
feature list.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Diffstat (limited to 'drivers/ddr/imx/phy/ddrphy_train.c')
0 files changed, 0 insertions, 0 deletions