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| author | Paul Barker <paul.barker.ct@bp.renesas.com> | 2024-11-20 09:48:28 +0000 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-12-08 23:06:52 +0100 |
| commit | 215663f5e47db92c6c13107e877a943c3e70aa2a (patch) | |
| tree | aa64a1752922b779f1752c38f24586cf4d7d1572 /drivers/ddr/imx/phy/ddrphy_train.c | |
| parent | 2b1a5efca8891ea320c23acd3681ca8bdb7fd15b (diff) | |
pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.
rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD & QSPI interfaces.
While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Diffstat (limited to 'drivers/ddr/imx/phy/ddrphy_train.c')
0 files changed, 0 insertions, 0 deletions