diff options
| author | Reid Tonking <reidt@ti.com> | 2024-11-19 06:02:56 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-12-04 14:30:18 -0600 |
| commit | 287a3b25bde4a340f81b0c85ca32860b6a39c1a0 (patch) | |
| tree | bbc3b5759896ecb82b67bdb1fd983fcdfed39c82 /drivers/ddr/imx/phy/ddrphy_utils.c | |
| parent | c9fff93cbe9ded56a7c865ed8ca1456d43357761 (diff) | |
misc: k3_avs: Add OPP_LOW voltage and frequency to vd_data
J7200 SOC supports OPP_LOW and OPP_NOM as two Operating Performance
Points as per (7.5 Operating Performance Points) section in the
Datasheet [0].
- A72SS/MSMC at 2 GHz/1GHz operation must use OPP_NOM.
- A72SS/MSMC at 1 GHz/500 MHz operation can use OPP_NOM or OPP_LOW
voltage (though OPP_LOW voltage is recommended to reduce power
consumption).
Add OPP_LOW frequency->voltage entry to vd_data.
The actual OPP voltage for the device is read from the efuse and
updated in k3_avs_probe().
OPP_NOM corresponds to OPP_1 and OPP_LOW to OPP_0 efuse register
fields, as described in the Datasheet [0]
The register offsets and fields are described in the TRM (5.2.6.1.5
WKUP_VTM_VD_OPPVID_j Register) [1].
[0]: https://www.ti.com/lit/gpn/dra821u (J7200 Datasheet)
[1]: https://www.ti.com/lit/pdf/spruiu1 (J7200 TRM)
Signed-off-by: Reid Tonking <reidt@ti.com>
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Diffstat (limited to 'drivers/ddr/imx/phy/ddrphy_utils.c')
0 files changed, 0 insertions, 0 deletions