diff options
| author | Chris Packham <judge.packham@gmail.com> | 2018-05-10 13:28:29 +1200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2018-05-14 10:01:56 +0200 |
| commit | 2b4ffbf6b4944a0b3125fd2c9c0ba3568264367a (patch) | |
| tree | dc75d0e07677505b8611a670483a349f214c9e75 /drivers/ddr/marvell/a38x/ddr3_a38x_topology.h | |
| parent | 00a7767766ace1f3ca3de7f9d44e145b9092bbad (diff) | |
ARM: mvebu: a38x: sync ddr training code with upstream
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT
INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.
Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_a38x_topology.h')
| -rw-r--r-- | drivers/ddr/marvell/a38x/ddr3_a38x_topology.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_a38x_topology.h b/drivers/ddr/marvell/a38x/ddr3_a38x_topology.h deleted file mode 100644 index be8de88f4e8..00000000000 --- a/drivers/ddr/marvell/a38x/ddr3_a38x_topology.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) Marvell International Ltd. and its affiliates - */ - -#ifndef _DDR3_A38X_TOPOLOGY_H -#define _DDR3_A38X_TOPOLOGY_H - -#include "ddr_topology_def.h" - -/* Bus mask variants */ -#define BUS_MASK_32BIT 0xf -#define BUS_MASK_32BIT_ECC 0x1f -#define BUS_MASK_16BIT 0x3 -#define BUS_MASK_16BIT_ECC 0x13 -#define BUS_MASK_16BIT_ECC_PUP3 0xb - -#define DYNAMIC_CS_SIZE_CONFIG -#define DISABLE_L2_FILTERING_DURING_DDR_TRAINING - -#endif /* _DDR3_A38X_TOPOLOGY_H */ |