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authorAndre Przywara <andre.przywara@arm.com>2022-07-13 16:27:57 +0100
committerAndre Przywara <andre.przywara@arm.com>2023-01-21 01:32:23 +0000
commiteb53e7743c8fde2ff6b47b54075086154b0126c1 (patch)
tree5dbbbd9957e98636c2940393675fabba92b6e424 /drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
parent4871650c95324c3a8697eab213ed327895b53082 (diff)
sunxi: h616: lower SPL stack address to avoid BROM data
When using the USB OTG FEL mode on the Allwinner H616, the BootROM stores some data at the end of SRAM C. This is also the location where we place the initial SPL stack, so it will overwrite this data. We still need the BROM code after running the SPL, so should leave that area alone. Interestingly this does not seem to have an adverse effect, I guess on the "way out" (when we return to FEL after the SPL has run), this data is not needed by the BROM, for just the trailing end of the USB operation. However this is still wrong, and we should not clobber BROM data. Lower the SPL stack address to be situated right below the swap buffers we use in sunxi-fel: that should be out of the way of everyone else. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c')
0 files changed, 0 insertions, 0 deletions