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authorBrandon Maier <brandon.maier@rockwellcollins.com>2021-01-20 10:39:46 -0600
committerMichal Simek <michal.simek@xilinx.com>2021-02-03 13:36:44 +0100
commitf1fd79afad97df76f0d84847d98d80d5a8c7e4ec (patch)
tree30846f848487a96a422f6206b89418cec89cd373 /drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
parentfdcb93e1709ab1a2ebb562455621617c29e2099c (diff)
spi: zynqmp_gqspi: support dual and quad mode
The dm_spi_ops.xfer() API does not support dual and quad SPI modes. It also doesn't allow the zynqmp_gqspi driver to calculate the correct number of dummy cycles for some NOR ops (as doing so also requires the buswidth). Port the zynqmp_gqspi driver to spi_controller_mem_ops, which gives us the buswidth values to correctly support all SNOR_PROTO_X_X_X commands and to properly calculate dummy cycles. Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com> CC: jagan@amarulasolutions.com CC: michal.simek@xilinx.com CC: Ashok Reddy Soma <ashokred@xilinx.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c')
0 files changed, 0 insertions, 0 deletions