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| author | Pratyush Yadav <p.yadav@ti.com> | 2021-06-26 00:47:16 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2021-06-28 12:00:32 +0530 |
| commit | 95954f55e91af538cce19fea4a731cc3474de6ff (patch) | |
| tree | 9ba7d3394f50aaf8b05514bd8ac27c91f0ff10e3 /drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h | |
| parent | 6182d15b3e4a40929df22e403601fd24abd3f918 (diff) | |
mtd: spi-nor-core: Add support for DTR protocol
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All phases need to be either DTR or STR.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h')
0 files changed, 0 insertions, 0 deletions