diff options
| author | Quentin Schulz <quentin.schulz@theobroma-systems.com> | 2024-03-14 10:36:24 +0100 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2024-03-14 18:19:44 +0800 |
| commit | 38f47eb468234f989dcef6b86bb44bf937c4857e (patch) | |
| tree | 80b988cccef6bbb95323dec915e61508a6493198 /drivers/ddr/marvell/axp/ddr3_dqs.c | |
| parent | d63c57e104fd3ae37108fb4d502d41d7380770ee (diff) | |
rockchip: adc: rockchip-saradc: add support for RK3588
This adds support for the SARADCv2 found on RK3588.
There is no stop callback as it is currently configured in single
conversion mode, where the ADC is powered down after a single conversion
has been made.
Due to what seems to be a silicon bug, a controller reset needs to be
issued before starting a channel conversion otherwise Rockchip says that
channel 1 will error whatever that means. This is aligned with upstream
and downstream Linux kernel as well as downstream U-Boot.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Diffstat (limited to 'drivers/ddr/marvell/axp/ddr3_dqs.c')
0 files changed, 0 insertions, 0 deletions