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authorStefan Roese <sr@denx.de>2021-11-18 09:19:38 +0100
committerStefan Roese <sr@denx.de>2021-12-19 09:50:47 +0100
commit0cbd3d8121189690130257009aa9363232c888d5 (patch)
tree2493d8ddb76e5908a90cf37bcf6b0fe8d64d38cd /drivers/ddr/marvell/axp/ddr3_spd.c
parent622882893d83e73e63d6c8c03c81bbbd2f04c19a (diff)
arm: mvebu: axp: ddr: Switch to using DM I2C API
No functional change intended. This patch switches from the legacy I2C API to the DM I2C API, so that this code can be used with DM I2C enabled. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ddr/marvell/axp/ddr3_spd.c')
-rw-r--r--drivers/ddr/marvell/axp/ddr3_spd.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/ddr/marvell/axp/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c
index dd772e63ab1..4763403c127 100644
--- a/drivers/ddr/marvell/axp/ddr3_spd.c
+++ b/drivers/ddr/marvell/axp/ddr3_spd.c
@@ -209,13 +209,19 @@ static u32 ddr3_get_dimm_num(u32 *dimm_addr)
/* Read the dimm eeprom */
for (dimm_cur_addr = MAX_DIMM_ADDR; dimm_cur_addr > MIN_DIMM_ADDR;
dimm_cur_addr--) {
+ struct udevice *udev;
+
data[SPD_DEV_TYPE_BYTE] = 0;
/* Far-End DIMM must be connected */
if ((dimm_num == 0) && (dimm_cur_addr < FAR_END_DIMM_ADDR))
return 0;
- ret = i2c_read(dimm_cur_addr, 0, 1, (uchar *)data, 3);
+ ret = i2c_get_chip_for_busnum(0, dimm_cur_addr, 1, &udev);
+ if (ret)
+ continue;
+
+ ret = dm_i2c_read(udev, 0, data, 3);
if (!ret) {
if (data[SPD_DEV_TYPE_BYTE] == SPD_MEM_TYPE_DDR3) {
dimm_addr[dimm_num] = dimm_cur_addr;
@@ -245,9 +251,15 @@ int ddr3_spd_init(MV_DIMM_INFO *info, u32 dimm_addr, u32 dimm_width)
__maybe_unused u8 vendor_high, vendor_low;
if (dimm_addr != 0) {
+ struct udevice *udev;
+
memset(spd_data, 0, SPD_SIZE * sizeof(u8));
- ret = i2c_read(dimm_addr, 0, 1, (uchar *)spd_data, SPD_SIZE);
+ ret = i2c_get_chip_for_busnum(0, dimm_addr, 1, &udev);
+ if (ret)
+ return MV_DDR3_TRAINING_ERR_TWSI_FAIL;
+
+ ret = dm_i2c_read(udev, 0, spd_data, SPD_SIZE);
if (ret)
return MV_DDR3_TRAINING_ERR_TWSI_FAIL;
}