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| author | Jayesh Choudhary <j-choudhary@ti.com> | 2024-06-14 18:14:38 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-06-24 09:51:10 -0600 |
| commit | e33ae0a97a3ab5b29a201b23d0f2ecd08396191e (patch) | |
| tree | 52b32be0d8c20fea2e405d5cded96eb2d9daf8d5 /drivers/ddr/marvell/axp/ddr3_spd.c | |
| parent | 57673a85a61b0bea28a20d7c90c581edb06ab457 (diff) | |
arm: mach-k3: j721s2: Enable QoS for DSS
Enable Quality of Service (QoS) blocks for Display SubSystem (DSS), by
servicing the DSS - DDR traffic from the Real-Time (RT) queue. This is
done by setting the DSS DMA orderID to greater than 9.
Before setting up the QoS, the ORDERID needs to be mapped to VBUSM sources
using setup_navss_nb() function call that sets the threadmap for NBSS
registers. (Section 10.2.9.2.10 "Quality of Service" in TRM[0])
Section 3.2.1 "Quality of Service (QoS)" in the TRM[0] provide more
details.
[0]: https://www.ti.com/lit/zip/spruj28
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Diffstat (limited to 'drivers/ddr/marvell/axp/ddr3_spd.c')
0 files changed, 0 insertions, 0 deletions