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| author | Peter Hoyes <Peter.Hoyes@arm.com> | 2021-08-19 16:53:10 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-02 10:17:45 -0400 |
| commit | 37a757e227ccfc7d9eef82ab38f8500a832ea01b (patch) | |
| tree | 3d6b9d9d6d0eadf4148449ad067ba0cd5eaac183 /drivers/ddr/microchip/ddr2.c | |
| parent | 53b40e8d54fcdb834e10e6538084517524b8401b (diff) | |
armv8: Ensure EL1&0 VMSA is enabled
On Armv8-R, the EL1&0 memory system architecture is configurable as a
VMSA or PMSA, and resets to an "architecturally unknown" value.
Add code to armv8_switch_to_el1_m which detects whether the MSA at
EL1&0 is configurable using the id_aa64mmfr0_el1 register MSA fields.
If it is we must ensure the VMSA is enabled so that a rich OS can boot.
The MSA and MSA_FRAC fields are described in the Armv8-R architecture
profile supplement (section G1.3.7):
https://developer.arm.com/documentation/ddi0600/latest/
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2.c')
0 files changed, 0 insertions, 0 deletions