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authorPratyush Yadav <p.yadav@ti.com>2021-06-26 00:47:08 +0530
committerJagan Teki <jagan@amarulasolutions.com>2021-06-28 11:57:10 +0530
commita6903aa7ea98872ff66424051f85cdf0178c86f8 (patch)
tree6ddeb563263d9cac5d04581d477b8e4e9be7c5da /drivers/ddr/microchip/ddr2.c
parentbd8c8dcd4d6fb1cf726d5a267be5ec33c93f1471 (diff)
spi: cadence-qspi: Add a small delay before indirect writes
Once the start bit is toggled it takes a small amount of time before it is internally synchronized. This means we can't start writing during that part. So add a small delay to allow the bit to be synchronized. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2.c')
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