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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2024-06-11 22:04:11 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2024-06-18 12:34:37 +0200 |
| commit | 1fd754cebd38d7456caa82bef15225cbe77960ec (patch) | |
| tree | 5b92ec9c48faee61420bf7c8b6ed269b10b8ca0d /drivers/ddr/microchip/ddr2_regs.h | |
| parent | 16324b43db3f2b4fbbc3b701893fcfc4104f33fb (diff) | |
cyclic: Rise default CYCLIC_MAX_CPU_TIME_US to 5000
The default value CYCLIC_MAX_CPU_TIME_US was 1000, which is
a little bit too low for slower hardware and sandbox.
On my MIPS Boston FPGA board with interaptiv CPU, wdt_cyclic
can easily take 3200 us to run.
On azure pipeline sandbox_clang, wdt_cyclic some times goes
beyond 1300 us.
Raise default value to 5000, which is the value already taken
by octeon_nic32. This is still sufficent to maintain system
responsiveness.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_regs.h')
0 files changed, 0 insertions, 0 deletions