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authorMichael Trimarchi <michael@amarulasolutions.com>2022-05-15 11:35:31 +0200
committerStefano Babic <sbabic@denx.de>2022-05-20 12:36:47 +0200
commita222c14792f15582648d1a00cdc40355ca9393ef (patch)
treeb1b0b172401491334b30ee2a5bc2e4ecf90a31b2 /drivers/ddr/microchip/ddr2_regs.h
parent78bf8e802c33883d1069f165d95866d9b5cd36fc (diff)
mtd: nand: mxs_nand_spl: Fix bad block skipping
The specific implementation was having bug. Those bugs are since the beginning of the implementation. Some manufactures can already experience this bug in their SPL code. This bug can be more visible on architecture that has complicated boot process like imx8mn. Older version of uboot can be affected if the bad block appear in correspoding of the beginning of u-boot image. In order to adjust the function we scan from the first erase block. The problematic part of old code was in this part: while (is_badblock(mtd, offs, 1)) { page = page + nand_page_per_block; /* Check i we've reached the end of flash. */ if (page >= mtd->size >> chip->page_shift) { free(page_buf); return -ENOMEM; } } Even we fix it adding increment of the offset of one erase block size , we don't fix the problem, because the first erase block where the image start is not checked. The code was tested on an imx8mn where the boot rom api was not able to skip it. This code is used by other architecures like imx6 and imx8mm Cc: Han Xu <han.xu@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_regs.h')
0 files changed, 0 insertions, 0 deletions