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| author | mingming lee <mingming.lee@mediatek.com> | 2019-12-31 11:29:22 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-01-16 09:39:45 -0500 |
| commit | 0670adb27aa99f87cc5f339efee0b9974711b026 (patch) | |
| tree | cddc0e86703ac650095bfce6136155eb6ded0849 /drivers/ddr/microchip/ddr2_timing.h | |
| parent | f62168d3c3d9bc0301dbc3ef9dc6d889ac19412e (diff) | |
clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions