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| author | Gaurav Jain <gaurav.jain@nxp.com> | 2022-04-19 10:52:28 +0530 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-04-21 15:18:25 +0200 |
| commit | 2c16bf2d14d7fbacafb5473f49487ba7f219e40c (patch) | |
| tree | 4a6aef4c41c0ba1b4c33151f812b59c0f2d5e648 /drivers/ddr/microchip/ddr2_timing.h | |
| parent | 96b2c9c9e0036e89fe65ad608275152ff44c5907 (diff) | |
crypto/fsl: add invalidate_dcache_range for hash output buffer
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.
caam_hash()
-moved address alignment check in the beginning of function.
-added invalidate_dcache_range for pout buffer before running descriptor.
Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions