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authorChia-Wei Wang <chiawei_wang@aspeedtech.com>2024-09-10 17:39:15 +0800
committerLeo Yu-Chi Liang <ycliang@andestech.com>2024-09-11 20:35:03 +0800
commit717002f8ff277bb687ce1f2739d0ef715d319ad9 (patch)
tree0902c33a732cee29870b9ffd28db52e073474447 /drivers/ddr/microchip/ddr2_timing.h
parent248292f4994b68af1e9d9b4e3c262552951f64e0 (diff)
riscv: u-boot-spl.lds: Remove _image_binary_end alignment
The _image_binary_end symbol was aligned to the 8-bytes boundary. However, the SPL device tree (u-boot-spl.dtb) is concatenated right after the binary (u-boot-spl-nodtb.bin) wihtout the consideration of the 8-bytes alignment restriction. After then, for the SPL_SEPARATE_BSS case, fdtdec_setup() searching for the DTB by _image_binary_end will return the "Missing DTB" error. As the real DTB starting point does not align to a 8-bytes address like _image_binary_end does. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
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