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authorNeal Frager <neal.frager@amd.com>2022-05-10 16:18:42 +0200
committerMichal Simek <michal.simek@amd.com>2022-05-18 13:17:18 +0200
commit80b8bbbf98fcb062d7bbc7bff10ef51086d3c422 (patch)
tree08261167120c1921566b4701bf369db326b8399c /drivers/ddr/microchip/ddr2_timing.h
parent155353234ec2259efae88c9973f81a53a2b9afb5 (diff)
arm64: zynqmp: zynqmp-zcu106-rev1.0: Fix DP PLL configuration
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-rev1.0 evaluation board. The Linux DP driver expects the DP to be using the following PLL config: - DP video PLL should use the VPLL (0x0) - DP audio PLL should use the RPLL (0x3) Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ae42ad6185418713a473660c8d15903299af7764.1652192319.git.michal.simek@amd.com
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
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