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| author | Caleb Connolly <caleb.connolly@linaro.org> | 2024-08-09 01:59:34 +0200 |
|---|---|---|
| committer | Caleb Connolly <caleb.connolly@linaro.org> | 2024-09-06 10:47:46 +0200 |
| commit | a01ed791c9d16ec07c02deb94dd9732df6eab96a (patch) | |
| tree | 45c3c815746df7e4d917025fd5b6d0b1d35ee3c6 /drivers/ddr/microchip/ddr2_timing.h | |
| parent | a9cbf76e4dd3c3295ed975a14ae4dfb258aefd4b (diff) | |
qcom_defconfig: bump CONFIG_NR_DRAM_BANKS
Some newer boards end up with a bunch of holes in the memory map due to
how Qualcomm's hypervisor and ABL work. The end result is 14+ memory
regions.
Bump CONFIG_NR_DRAM_BANKS to 24 so we can handle these and any future
expansion easily.
Yes, this is ridiculous, but there is no other way.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions