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| author | Pratyush Yadav <p.yadav@ti.com> | 2021-06-26 00:47:03 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2021-06-28 11:53:48 +0530 |
| commit | a1eb40b70b40d208a72765c0f56cffed4e22ff30 (patch) | |
| tree | e476dec15c594135cd160ffacde6ab0ccbf2ada6 /drivers/ddr/microchip/ddr2_timing.h | |
| parent | 0d7066bce23d3732cd3a59176ccd7a3ee7be9d63 (diff) | |
spi: spi-mem: allow specifying whether an op is DTR or not
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions