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| author | Jonas Karlman <jonas@kwiboo.se> | 2024-12-12 23:57:10 +0000 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-01-10 18:56:18 -0600 |
| commit | afbc34c79ceea585a7c8d97b5011ba377b7b0a63 (patch) | |
| tree | 71b1312ce78c0f936986419de54db9682a87e978 /drivers/ddr/microchip/ddr2_timing.h | |
| parent | 01048aa9f8d669869a4dff8399e2238dd39b0531 (diff) | |
rockchip: rk3399-gru: Move SPI flash payload offset for bob and kevin
The BootROM on RK3399 only read the first 2 KB of each 4 KB page from
SPI flash. With current FIT payload offset of 0x40000 this limits the
supported TPL+SPL size to only 128 KB.
Change to use 0xE0000 as FIT payload offset, similar to other RK3399
boards, to allow a maximum size for TPL of 192 KB and SPL of 256 KB.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions