diff options
author | Hans de Goede <hdegoede@redhat.com> | 2016-04-09 13:53:48 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-04-11 20:48:26 -0400 |
commit | c09d29057ab0b04db0857d319c6bff74de31b9c3 (patch) | |
tree | 9f01964012e2eadce3e7d8e1b33e3d2e6d2264f9 /drivers/ddr/microchip/ddr2_timing.h | |
parent | 456ecd08ec026e67a17a77baa3778c9f1b8e474d (diff) |
arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code
v7_maint_dcache_all() does not work reliable when build with gcc6,
see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788
While debugging this I learned that v7_maint_dcache_all() is unreliable
when build with gcc5 too when it is marked as noinline.
This commit fixes the reliability issues by replacing the C-code with
the ready to use asm implementation from the kernel.
Given that this code when written as C-code clearly is quite fragile
(also see the existing comments about the C-code being the way it is
to get optimal assembly) and that we have a proven asm alternative,
I believe that this is the best solution.
Note that we actually already had a copy of the kernel's
v7_flush_dcache_all() before this commit in
arch/arm/mach-uniphier/arm32/lowlevel_init.S.
This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames
it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper
which saves / restores the clobbered registers for use from C-code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions