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| author | Jernej Skrabec <jernej.skrabec@gmail.com> | 2024-08-24 17:58:28 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2025-07-27 22:58:05 +0100 |
| commit | d157dec118f8cf81bc60dcfd010cc30bde8e5e23 (patch) | |
| tree | 25024af0e29551d9dd704af54a2cd0e8c42658df /drivers/ddr/microchip/ddr2_timing.h | |
| parent | 7a5170a6fc7797435e2a2934421ebc216bb1dcfe (diff) | |
sunxi: sun50i_h6: add A523 SPL clock setup code
This adds the early A523 clock setup code, for the basic peripheral PLL
and the basic bus clocks (APB/AHB). This is quite close to the existing
H6 and H616 clock code, so this shares the same file. A few bits and bobs
are different, though, so filter for the A523 in a few occasions.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_timing.h')
0 files changed, 0 insertions, 0 deletions