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authorViorel Suman <viorel.suman@nxp.com>2025-04-01 15:56:35 +0800
committerFabio Estevam <festevam@gmail.com>2025-04-11 08:26:27 -0300
commit51eed1cacaa6eab780914ce9e1f6a948b60ecc34 (patch)
treeccb38d3724abbe0d8ad1bc8f02dd8da20ee59237 /drivers/ddr/microchip
parenta3139fe0572ed39db3b0be526d71e1d23cb8c467 (diff)
firmware: scmi: smt: Interrupt communication enable
i.MX95 System Manager uses interrupt driven communication which requires the caller to set Bit[0] of channel flags to 1. When transmission completes and the previous general purpose interrupt has been processed by the other core, i.MX95 System Manager will set General Purpose Interrupt Control Register (GCR). U-Boot polls General-purpose Status (GSR) to check if the operation is finished. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/microchip')
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