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authorTien Fong Chee <tien.fong.chee@intel.com>2025-08-08 22:20:42 +0800
committerTien Fong Chee <tien.fong.chee@intel.com>2025-08-08 22:20:42 +0800
commit3721998510de23ff77e0f9cbb61c8c5f8c38ddd2 (patch)
tree4e1bb02717fe911659ff57084c02db077c2ef344 /drivers/ddr
parent677147c167ecbf4ac220a099b849cc7a5a03fec4 (diff)
arm: socfpga: Enable ASYNC interrupts in Agilex SPL
Asynchronous aborts were previously masked at SPL entry. To ensure early detection of system errors such as ECC faults or bus errors, asynchronous aborts should be explicitly unmasked by clearing the A-bit in the DAIF register during Agilex SPL initialization. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com> # Conflicts: # arch/arm/mach-socfpga/spl_agilex.c
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