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authorTom Rini <trini@konsulko.com>2022-10-11 09:57:08 -0400
committerTom Rini <trini@konsulko.com>2022-10-11 09:57:08 -0400
commit300077cf8cfe6875f3f0a919ec1d0dd32c42b178 (patch)
treeb2298def2119bcb893965610b4b8575d89a4cc15 /drivers/fpga/altera.c
parent20be7c19a2d6d4a994c40c014ae53b39bdcfacf1 (diff)
parent63c46e028c14254f28332b3bd57fc3202e26b10a (diff)
Merge tag 'xilinx-for-v2023.01-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2023.01-rc1 (round 3) fpga: - Create new uclass - Get rid of FPGA_DEBUG and use logging infrastructure zynq: - Enable early EEPROM decoding - Some DT updates zynqmp: - Use OCM_BANK_0 to check config loading permission - Change config object loading in SPL - Some DT updates net: - emaclite: Enable driver for RISC-V xilinx: - Fix static checker warnings - Fix GCC12 warning sdhci: - Read PD id from DT
Diffstat (limited to 'drivers/fpga/altera.c')
-rw-r--r--drivers/fpga/altera.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 10c0475d259..6a4f0cb9bc0 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -7,6 +7,8 @@
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
/*
* Altera FPGA support
*/
@@ -16,9 +18,6 @@
#include <log.h>
#include <stratixII.h>
-/* Define FPGA_DEBUG to 1 to get debug printf's */
-#define FPGA_DEBUG 0
-
static const struct altera_fpga {
enum altera_family family;
const char *name;
@@ -106,8 +105,7 @@ int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Loader...\n", fpga->name);
if (fpga->load)
return fpga->load(desc, buf, bsize);
return 0;
@@ -120,8 +118,7 @@ int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Reader...\n", fpga->name);
if (fpga->dump)
return fpga->dump(desc, buf, bsize);
return 0;