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authorMarek Vasut <marex@denx.de>2024-04-14 20:39:29 +0200
committerPatrice Chotard <patrice.chotard@foss.st.com>2024-04-19 11:32:41 +0200
commitb5e7c5da8bf3b40bec36295818f0333c5d918630 (patch)
tree76250796154bd3bf25c832cf4c7591e5af675ccf /drivers/fpga/fpga.c
parent97b6c77c20544b4d4bbd470a57822f1230aabb45 (diff)
ARM: stm32: Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
SoC revision is only accessible via DBUMCU IDC register, which requires BSEC.DENABLE DBGSWENABLE bit to be set to make the register accessible, otherwise an access to the register triggers bus fault. As BSEC.DBGSWENABLE is zero in case of an OTP-CLOSED system, do NOT set DBGSWENABLE bit as this might open a brief window for timing attacks. Instead, report that this system is OTP-CLOSED and do not report any SoC revision to avoid confusing users. Use an SEC/C abbreviation to avoid growing SOC_NAME_SIZE . Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'drivers/fpga/fpga.c')
0 files changed, 0 insertions, 0 deletions