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authorMarek Vasut <marex@denx.de>2024-03-04 17:16:05 +0100
committerTom Rini <trini@konsulko.com>2024-10-10 08:10:12 -0600
commit215f1d5794c6174ec0413eb6ff7f322ed284cc5b (patch)
tree6f9460b27b82d582ab2d07a2cdbfe3f3b93b0345 /drivers/fpga/intel_sdm_mb.c
parent1ff60b1f0a0973b5acda21232262f6745491e5af (diff)
mtd: spi-nor: Clear Winbond SR3 WPS bit on boot
Some Winbond SPI NORs have special SR3 register which is used among other things to control whether non-standard "Individual Block/Sector Write Protection" (WPS bit) locking scheme is activated. This non-standard locking scheme is not supported by either U-Boot or Linux SPI NOR stack so make sure it is disabled, otherwise the SPI NOR may appear locked for no obvious reason. This SR3 WPS appears e.g. on W25Q16FW which has the same ID as W25Q16DW, but the W25Q16DW does not implement the SR3 WPS bit. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/fpga/intel_sdm_mb.c')
0 files changed, 0 insertions, 0 deletions