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authorNeil Armstrong <neil.armstrong@linaro.org>2024-11-25 09:34:26 +0100
committerCaleb Connolly <caleb.connolly@linaro.org>2025-01-22 16:36:15 +0100
commit5b359312e5f6fca42a3783901ca287ef7c8ed550 (patch)
tree703accd96cefcc39935cc2819f10b74075e83164 /drivers/fpga/intel_sdm_mb.c
parentbc09b58e2ab2fd0b62e72bd2d80ef288b7307e31 (diff)
clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock
The PCIe PIPE clock requires a special setup function to mux & enable the clock from the PCIe PHY before the PHY has enabled the clock. Import the clk_phy_mux_enable() from the Linux driver to use the same implementation regarding the PIPE clock. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-1-4315d1e4e164@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers/fpga/intel_sdm_mb.c')
0 files changed, 0 insertions, 0 deletions