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| author | Michael Bode <michael.bode@bshg.com> | 2025-05-21 11:47:32 +0200 |
|---|---|---|
| committer | Fabio Estevam <festevam@gmail.com> | 2025-05-21 07:53:13 -0300 |
| commit | b7b301c9061401eaea34e19e65cb1862269c9001 (patch) | |
| tree | 77dc4029991fd4c5b49c7eaace145c1bef475319 /drivers/fpga/intel_sdm_mb.c | |
| parent | 6c885d9ac6306bfe52e5a3b4bcc920112efd8d0b (diff) | |
board: bsh: imx6ulz_smm_m2: Add delay between DRAM read access
A small delay between DRAM read access with wrong parameters and
reconfiguration is necessary.
Without a delay between DRAM read access and a following reconfiguration
this reconfiguration fails for certain DRAM chips (Nanya).
Signed-off-by: Michael Bode <michael.bode@bshg.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Diffstat (limited to 'drivers/fpga/intel_sdm_mb.c')
0 files changed, 0 insertions, 0 deletions