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authorCaleb Connolly <caleb.connolly@linaro.org>2024-06-18 16:57:57 +0200
committerMarek Vasut <marex@denx.de>2024-07-13 19:51:16 +0200
commit1bd136715a4d3a8e44ccbe693e4c2a9010efb342 (patch)
tree6c985415d7b6c5f6e0e8b37896ad755d4480b729 /drivers/fpga/lattice.c
parentb182816c1fb436916661949213c543bf4d42250b (diff)
eth: asix88179: reset during probe
In some cases (consistently in my case with an embedded board) the ethernet controller will time out on the first init but always succeed after reset. Let's reset the controller during probe so we always start with it in a known state, and don't have wait for the first asix_wait_link() to time out. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Diffstat (limited to 'drivers/fpga/lattice.c')
0 files changed, 0 insertions, 0 deletions