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| author | Tom Rini <trini@konsulko.com> | 2025-07-31 08:42:06 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-07-31 08:42:06 -0600 |
| commit | eef444c38994aee9cd3c6e4df5791b5f7209c8d8 (patch) | |
| tree | cea1d9071449690a92258961ca876a42ca0bc739 /drivers/fpga/socfpga_gen5.c | |
| parent | 79f3e77133bd7248e4579827effc13f97a32a8a8 (diff) | |
| parent | 4064e7c9fc42c1c376bd919a80b451273472f3df (diff) | |
Merge tag 'u-boot-socfpga-next-20250731' of https://source.denx.de/u-boot/custodians/u-boot-socfpga
This pull request includes updates for the SoCFPGA platform intended for the 2025.10 release
cycle. The highlights focus on enabling the Power Manager for Agilex5, NAND boot support
enhancements, and various bug fixes and cleanups across SoCFPGA components.
CI:
* https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27221
Summary of changes:
Agilex5 Power Manager:
* Initial driver support and DT bindings are added for the Agilex5 Power Manager, enabling
better power domain control.
NAND Boot Support for Agilex5:
* SPL support for NAND boot is enabled.
* UBI/UBIFS support is configured in defconfigs.
* Memory layout updates (malloc and BSS relocation) ensure proper boot behavior.
Code Quality Improvements:
* Coverity and runtime bug fixes (e.g., jtag_usercode check, sub-device conditionals).
* Several cleanup patches addressing formatting, logic, and initialization issues.
General Maintenance:
* SPDX license tags and header include fixes.
* Device tree updates to limit SPI clock frequency and other minor adjustments.
These contributions come from Alif Zakuan Yuslaimi, Andrew Goodbody, Dinesh Maniyam, Naresh
Kumar Ravulapalli, and Tingting Meng.
This patch set has been tested on Agilex 5 devkit.
Diffstat (limited to 'drivers/fpga/socfpga_gen5.c')
| -rw-r--r-- | drivers/fpga/socfpga_gen5.c | 25 |
1 files changed, 6 insertions, 19 deletions
diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c index 9473f057328..964a5cc8789 100644 --- a/drivers/fpga/socfpga_gen5.c +++ b/drivers/fpga/socfpga_gen5.c @@ -119,27 +119,14 @@ static int fpgamgr_program_poll_cd(void) { const uint32_t mask = FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK | FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK; - unsigned long reg, i; + unsigned long reg; - /* (3) wait until full config done */ - for (i = 0; i < FPGA_TIMEOUT_CNT; i++) { - reg = readl(&fpgamgr_regs->gpio_ext_porta); - - /* Config error */ - if (!(reg & mask)) { - printf("FPGA: Configuration error.\n"); - return -3; - } - - /* Config done without error */ - if (reg & mask) - break; - } + reg = readl(&fpgamgr_regs->gpio_ext_porta); - /* Timeout happened, return error */ - if (i == FPGA_TIMEOUT_CNT) { - printf("FPGA: Timeout waiting for program.\n"); - return -4; + /* Config error */ + if (!(reg & mask)) { + printf("FPGA: Configuration error.\n"); + return -3; } /* Disable AXI configuration */ |