diff options
| author | Quentin Schulz <quentin.schulz@cherry.de> | 2025-07-30 13:10:21 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-07-30 08:23:00 -0600 |
| commit | d0681cf0c8cde4dcf98d02912d5f0ef2ec786c9e (patch) | |
| tree | 27099671e18378a92c1667e106473e7ec8a361fd /drivers/fpga/xilinx.c | |
| parent | 6dd61725a2207c0ac3a01138ed34fd73af2e9dde (diff) | |
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
The u2phy1_host port is the part of the USB PHY1 (namely the
HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers and associated part in USB2.0 PHY.
No intended functional change.
[1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
Chapter 2 USB2.0 PHY
Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-4-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 3373af1d76bacd054b37f3e10266dd335ce425f8 ]
(cherry picked from commit 97640da1f41d022484c1a4725bed943a5ae56073)
Diffstat (limited to 'drivers/fpga/xilinx.c')
0 files changed, 0 insertions, 0 deletions