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authorJonas Karlman <jonas@kwiboo.se>2025-07-21 22:07:17 +0000
committerKever Yang <kever.yang@rock-chips.com>2025-08-31 00:48:15 +0800
commit9d39a56922878562b263e45f45523021cf5e7789 (patch)
tree82bc7eaa1f1979fcb2e4f91369fe5c1ccbffa7da /drivers/fpga/zynqmppl.c
parentfca01a8792e6ed48a00e08124d55f4f74e47b11d (diff)
rockchip: rk3588: Disable USB3OTG U3 ports early
The RK3588 SoC comes with USB OTG support using a DWC3 controller with a USB2 PHY and a USB3 PHY (USBDP PHY). Some board designs may not use the USBDP PHY for USB3 purpose. For these board to use USB OTG the input clock source must change to use UTMI clk instead of PIPE clk. Change to always disable the USB3OTG U3 ports early and leave it to the USBDP PHY driver to re-enable the U3 port when a usb3-phy is described in the board device tree. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/fpga/zynqmppl.c')
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