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author | Tom Rini <trini@konsulko.com> | 2019-01-24 10:47:05 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2019-01-24 10:47:05 -0500 |
commit | ce0d1e48165fdd3bde4bb431f1d2e100b1617a6e (patch) | |
tree | 8b30f2052d732ae7cfae221be6a9287f87e1de78 /drivers/fpga/zynqmppl.c | |
parent | aff66f22d6eeb27c6329c0a3c1ebc52914c8affa (diff) | |
parent | 4efdbc88b79bd8bd3e285cd238e1942d669a7088 (diff) |
Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04
tools:
- Fix zynqmpimage generation
zynq:
- Some configs/Kconfig/DT updates
- Enable REMAKE_ELF and OF_SEPARATE
- Topic boards update
- i2c cleanups and conversion to DM_I2C
zynqmp:
- Some configs/Kconfig/DT updates
- Board config cleanup
- Move arch folder to mach-zynqmp
versal:
- Enable DM_I2C, CMD_DM
zynq-gem:
- Fix driver cache handling
i2c:
- Live tree simple update
phy:
- Fixed phy cleanup
travis:
- Wire Versal SoC
Diffstat (limited to 'drivers/fpga/zynqmppl.c')
-rw-r--r-- | drivers/fpga/zynqmppl.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index c095d5ecaa8..22bfdd8dce6 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -233,7 +233,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, (u32)bsize, 0, ret_payload); if (ret) - debug("PL FPGA LOAD fail\n"); + puts("PL FPGA LOAD fail\n"); return ret; } |