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| author | Frank Böwingloh <f.boewingloh@beckhoff.com> | 2025-08-08 14:31:34 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2025-08-25 16:20:47 +0200 |
| commit | 3b765ae05005249b91a737cd620e0577a8d5b9ba (patch) | |
| tree | b6824f58ae1c09d003b556069ad1b27d70775ee8 /drivers/fpga | |
| parent | 6ce599f513172147362e8a2f7424837a2dd60e90 (diff) | |
soc: xilinx: zynqmp: Fix zu1cg device detection
Currently u-boot displayed a zu1cg soc as "Chip: zu1eg".
A value of 0468_8093h in the IDCODE (CSU) Register defines a ZU1 soc
not only for the EG family but also for the CG family as described
in the Xilinx Zynq UltraScale+ UG1085 documentation in Table 1-2.
Signed-off-by: Frank Böwingloh <f.boewingloh@beckhoff.com>
Cc: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250808123134.636-1-f.boewingloh@beckhoff.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'drivers/fpga')
0 files changed, 0 insertions, 0 deletions