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author | Hai Pham <hai.pham.ud@renesas.com> | 2023-01-26 21:06:06 +0100 |
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committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2023-02-02 01:49:20 +0100 |
commit | d8132ae37ad66be63591d8ef34d95b8822361754 (patch) | |
tree | 451f583bdb49f26bb6ff4fb3b61ac5a179344e46 /drivers/gpio/adi_gpio2.c | |
parent | 4dbbc3f37387e6a7248ec057b617690bf7ff9a7d (diff) |
clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHI
On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on
the other R-Car gen3 SoCs. Hence, new clock types are introduced
respectively.
Based on Linux commit 381081ffc294 ("clk: renesas: r8a77970: Add SD0H/SD0
clocks for SDHI") by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Fix missing ~ in GENMASK(a, b), use clrsetbits_le32 instead
- Do not modify r8a77970-cpg-mssr.c much, drop enum r8a77970_clk_types
which is now part of common clock types in rcar-gen3-cpg.h instead
Diffstat (limited to 'drivers/gpio/adi_gpio2.c')
0 files changed, 0 insertions, 0 deletions