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authorJonas Karlman <jonas@kwiboo.se>2025-07-30 23:52:45 +0000
committerKever Yang <kever.yang@rock-chips.com>2025-08-30 23:26:08 +0800
commit58d39bbd773965404cd8cc41ebb94488b48ac1a4 (patch)
tree33a498a934fea31b04cea4d9b20b40ea88101268 /drivers/gpio/stm32_gpio_priv.h
parent95ae8b040b891596c5a7916a0955d7820fc9e380 (diff)
rockchip: rk3528: Disable USB3OTG U3 port early
The RK3528 SoC comes with USB OTG support using a DWC3 controller with a USB2 PHY and a USB3 PHY (COMBPHY). Some board designs may not use the COMBPHY for USB3 purpose. For these board to use USB OTG the input clock source must change to use UTMI clk instead of PIPE clk. Change to always disable the USB3OTG U3 port early and leave it to the COMBPHY driver to re-enable the U3 port when a usb3-phy is described in the board device tree. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/gpio/stm32_gpio_priv.h')
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