diff options
| author | Poonam Aggrwal <poonam.aggrwal@freescale.com> | 2009-07-31 12:08:27 +0530 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-08-28 17:12:39 -0500 |
| commit | 87c7661b42aa7672539b54b51d3d5c4013ec6f6c (patch) | |
| tree | 8ea50290ecaa58e4d8cc329f9b8e870e87d9545c /drivers/misc | |
| parent | 728ece343e8bb2a66ee977c49d455439e3b28da9 (diff) | |
85xx: Added P1020 Processor Support.
P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/misc')
| -rw-r--r-- | drivers/misc/fsl_law.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index f7d454dce45..af7b7299349 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610) #define FSL_HW_NUM_LAWS 10 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \ - defined(CONFIG_P2020) + defined(CONFIG_P2020) || defined(CONFIG_P1020) #define FSL_HW_NUM_LAWS 12 #else #error FSL_HW_NUM_LAWS not defined for this platform |