diff options
author | Tom Rini <trini@konsulko.com> | 2019-08-27 13:19:47 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2019-08-27 13:19:47 -0400 |
commit | 8c56ea5c1e033f16993e5427300399ef848234bb (patch) | |
tree | 9c92d106a8cadca5b522e503e75c1ba936175f2d /drivers/mmc | |
parent | e4b8dd9b34021241cd05d5cc9d24b4ae34657830 (diff) | |
parent | 06d1dd2cdc3c69122e58b38fd11b2a4e524a37e2 (diff) |
Merge branch 'u-boot-stm32_20190827' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixes and update related to STM32MP1 platforms
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/sti_sdhci.c | 6 | ||||
-rw-r--r-- | drivers/mmc/stm32_sdmmc2.c | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c index 8ed47e113db..d6c75ea6010 100644 --- a/drivers/mmc/sti_sdhci.c +++ b/drivers/mmc/sti_sdhci.c @@ -97,14 +97,14 @@ static int sti_sdhci_probe(struct udevice *dev) SDHCI_QUIRK_NO_HISPD_BIT; host->host_caps = MMC_MODE_DDR_52MHz; + host->mmc = &plat->mmc; + host->mmc->dev = dev; + host->mmc->priv = host; ret = sdhci_setup_cfg(&plat->cfg, host, 50000000, 400000); if (ret) return ret; - host->mmc = &plat->mmc; - host->mmc->priv = host; - host->mmc->dev = dev; upriv->mmc = host->mmc; return sdhci_probe(dev); diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 867ed569ebc..32434a4762f 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -14,6 +14,7 @@ #include <asm/io.h> #include <asm/gpio.h> #include <linux/iopoll.h> +#include <watchdog.h> struct stm32_sdmmc2_plat { struct mmc_config cfg; @@ -190,7 +191,7 @@ struct stm32_sdmmc2_ctx { #define SDMMC_IDMACTRL_IDMAEN BIT(0) #define SDMMC_CMD_TIMEOUT 0xFFFFFFFF -#define SDMMC_BUSYD0END_TIMEOUT_US 1000000 +#define SDMMC_BUSYD0END_TIMEOUT_US 2000000 static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, struct mmc_data *data, @@ -432,6 +433,8 @@ static int stm32_sdmmc2_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, u32 cmdat = data ? SDMMC_CMD_CMDTRANS : 0; int ret, retry = 3; + WATCHDOG_RESET(); + retry_cmd: ctx.data_length = 0; ctx.dpsm_abort = false; |