Merge https://source.denx.de/u-boot/custodians/u-boot-snapdragon

Support is added for 5 new Qualcomm SoCs:

* QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2
  respectively. SM6115 is also used in some mid-range smartphones/tablets.
  Initial support includes buttons and USB (host and gadget).
* SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship
  smartphones. The board can boot to a U-Boot prompt, but is missing regulators
  necessary for USB support.
* SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024
  respectively. Found on many high end smartphones.

In addition:

* Support is added for the Schneider HMIBSC board.
* mach-snapdragon switches to OF_UPSTREAM
* IPQ40xx gets several regressions fixed and some overall cleanup.
* The MSM serial driver gains the ability to generate the bit-clock
  automatically, no longer relying on a custom DT property.
* The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles
  don't need to be added).
* Support for the GENI I2C controller is added.
* The qcom SPMI driver has SPMI v5 support fixed, and v7 support added.
* The qcom sdhci driver gets some fixes for SDCC v5 support.
* SDM845 gains sdcard support
* Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650)
* SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs.
* RB2 gets a work-around to fix the USB dr_mode property before booting Linux.

1 files changed, 29 insertions, 14 deletions

diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 059cb3da77c..5e9d66526a8 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -33,9 +33,6 @@
 #define SDCC_MCI_STATUS2_MCI_ACT 0x1
 #define SDCC_MCI_HC_MODE 0x78
 
-/* Non standard (?) SDHCI register */
-#define SDHCI_VENDOR_SPEC_CAPABILITIES0  0x11c
-
 struct msm_sdhc_plat {
 	struct mmc_config cfg;
 	struct mmc mmc;
@@ -49,6 +46,8 @@ struct msm_sdhc {
 
 struct msm_sdhc_variant_info {
 	bool mci_removed;
+
+	u32 core_vendor_spec_capabilities0;
 };
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -63,7 +62,7 @@ static int msm_sdc_clk_init(struct udevice *dev)
 
 	ret = ofnode_read_u32(node, "clock-frequency", (uint *)(&clk_rate));
 	if (ret)
-		clk_rate = 400000;
+		clk_rate = 201500000;
 
 	ret = clk_get_bulk(dev, &prv->clks);
 	if (ret) {
@@ -174,6 +173,8 @@ static int msm_sdc_probe(struct udevice *dev)
 
 	core_minor = core_version & SDCC_VERSION_MINOR_MASK;
 
+	log_debug("SDCC version %d.%d\n", core_major, core_minor);
+
 	/*
 	 * Support for some capabilities is not advertised by newer
 	 * controller versions and must be explicitly enabled.
@@ -181,7 +182,7 @@ static int msm_sdc_probe(struct udevice *dev)
 	if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
 		caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
 		caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
-		writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0);
+		writel(caps, host->ioaddr + var_info->core_vendor_spec_capabilities0);
 	}
 
 	ret = mmc_of_parse(dev, &plat->cfg);
@@ -207,7 +208,7 @@ static int msm_sdc_remove(struct udevice *dev)
 	var_info = (void *)dev_get_driver_data(dev);
 
 	/* Disable host-controller mode */
-	if (!var_info->mci_removed)
+	if (!var_info->mci_removed && priv->base)
 		writel(0, priv->base + SDCC_MCI_HC_MODE);
 
 	clk_release_bulk(&priv->clks);
@@ -217,21 +218,31 @@ static int msm_sdc_remove(struct udevice *dev)
 
 static int msm_of_to_plat(struct udevice *dev)
 {
-	struct udevice *parent = dev->parent;
 	struct msm_sdhc *priv = dev_get_priv(dev);
+	const struct msm_sdhc_variant_info *var_info;
 	struct sdhci_host *host = &priv->host;
-	int node = dev_of_offset(dev);
+	int ret;
+
+	var_info = (void*)dev_get_driver_data(dev);
 
 	host->name = strdup(dev->name);
 	host->ioaddr = dev_read_addr_ptr(dev);
-	host->bus_width = fdtdec_get_int(gd->fdt_blob, node, "bus-width", 4);
-	host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0);
-	priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
-			dev_of_offset(parent), node, "reg", 1, NULL, false);
-	if (priv->base == (void *)FDT_ADDR_T_NONE ||
-	    host->ioaddr == (void *)FDT_ADDR_T_NONE)
+	ret = dev_read_u32(dev, "bus-width", &host->bus_width);
+	if (ret)
+		host->bus_width = 4;
+	ret = dev_read_u32(dev, "index", &host->index);
+	if (ret)
+		host->index = 0;
+	priv->base = dev_read_addr_index_ptr(dev, 1);
+
+	if (!host->ioaddr)
 		return -EINVAL;
 
+	if (!var_info->mci_removed && !priv->base) {
+		printf("msm_sdhci: MCI base address not found\n");
+		return -EINVAL;
+	}
+
 	return 0;
 }
 
@@ -244,10 +255,14 @@ static int msm_sdc_bind(struct udevice *dev)
 
 static const struct msm_sdhc_variant_info msm_sdhc_mci_var = {
 	.mci_removed = false,
+
+	.core_vendor_spec_capabilities0 = 0x11c,
 };
 
 static const struct msm_sdhc_variant_info msm_sdhc_v5_var = {
 	.mci_removed = true,
+
+	.core_vendor_spec_capabilities0 = 0x21c,
 };
 
 static const struct udevice_id msm_mmc_ids[] = {