diff options
| author | Tom Rini <trini@konsulko.com> | 2023-01-09 11:30:08 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-01-09 11:30:08 -0500 |
| commit | cebdfc22da6eb81793b616e855bc4d6d89c1c7a6 (patch) | |
| tree | 44eaafcbe4866712d361304882e7d56ca0ef1682 /drivers/mtd/nand/raw/lpc32xx_nand_mlc.c | |
| parent | 62e2ad1ceafbfdf2c44d3dc1b6efc81e768a96b9 (diff) | |
| parent | fe33066d246462551f385f204690a11018336ac8 (diff) | |
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/mtd/nand/raw/lpc32xx_nand_mlc.c')
| -rw-r--r-- | drivers/mtd/nand/raw/lpc32xx_nand_mlc.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c index 5bc5301d634..28541177609 100644 --- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c +++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c @@ -84,8 +84,8 @@ struct lpc32xx_nand_mlc_registers { static struct lpc32xx_nand_mlc_registers __iomem *lpc32xx_nand_mlc_registers = (struct lpc32xx_nand_mlc_registers __iomem *)MLC_NAND_BASE; -#if !defined(CONFIG_SYS_MAX_NAND_CHIPS) -#define CONFIG_SYS_MAX_NAND_CHIPS 1 +#if !defined(CFG_SYS_MAX_NAND_CHIPS) +#define CFG_SYS_MAX_NAND_CHIPS 1 #endif #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o) @@ -141,13 +141,13 @@ static void lpc32xx_nand_init(void) clk = get_hclk_clk_rate(); writel( - clkdiv(CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_LOW, 0x0F, 8) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_HIGH, 0x0F, 4) | - clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_LOW, 0x0F, 0), + clkdiv(CFG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) | + clkdiv(CFG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) | + clkdiv(CFG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) | + clkdiv(CFG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) | + clkdiv(CFG_LPC32XX_NAND_MLC_RD_LOW, 0x0F, 8) | + clkdiv(CFG_LPC32XX_NAND_MLC_WR_HIGH, 0x0F, 4) | + clkdiv(CFG_LPC32XX_NAND_MLC_WR_LOW, 0x0F, 0), &lpc32xx_nand_mlc_registers->time_reg); } @@ -586,7 +586,7 @@ void board_nand_init(void) lpc32xx_nand_init(); /* identify chip */ - ret = nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_CHIPS, NULL); + ret = nand_scan_ident(mtd, CFG_SYS_MAX_NAND_CHIPS, NULL); if (ret) { pr_err("nand_scan_ident returned %i", ret); return; |