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authorMichael Trimarchi <michael@amarulasolutions.com>2022-07-20 18:22:13 +0200
committerMichael Trimarchi <michael@amarulasolutions.com>2022-07-22 13:29:06 +0200
commitbd6adff22f08162be9cec3d2a02f1ef6e670ac16 (patch)
treedfb7e0b962c4cb086d930fb9095ed757c3374d90 /drivers/mtd/nand/raw/nand_base.c
parentc596e01f18c5177f9d2a1f770c5d9e33391c929f (diff)
mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
Upstream linux commit 229204da53b31d. Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Diffstat (limited to 'drivers/mtd/nand/raw/nand_base.c')
-rw-r--r--drivers/mtd/nand/raw/nand_base.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index fe7e049d406..68e6f4f1434 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4200,7 +4200,6 @@ static int nand_manufacturer_init(struct nand_chip *chip)
static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
{
struct mtd_info *mtd = &chip->mtd;
- int maf_id = chip->id.data[0];
mtd->erasesize = type->erasesize;
mtd->writesize = type->pagesize;
@@ -4208,19 +4207,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
/* All legacy ID NAND are small-page, SLC */
chip->bits_per_cell = 1;
-
- /*
- * Check for Spansion/AMD ID + repeating 5th, 6th byte since
- * some Spansion chips have erasesize that conflicts with size
- * listed in nand_ids table.
- * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
- */
- if (maf_id == NAND_MFR_AMD && chip->id.data[4] != 0x00 &&
- chip->id.data[5] == 0x00 && chip->id.data[6] == 0x00 &&
- chip->id.data[7] == 0x00 && mtd->writesize == 512) {
- mtd->erasesize = 128 * 1024;
- mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1);
- }
}
/*
@@ -4245,8 +4231,7 @@ static void nand_decode_bbm_options(struct mtd_info *mtd,
* Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
* AMD/Spansion, and Macronix. All others scan only the first page.
*/
- if (nand_is_slc(chip) &&
- (maf_id == NAND_MFR_AMD || maf_id == NAND_MFR_MACRONIX))
+ if (nand_is_slc(chip) && maf_id == NAND_MFR_MACRONIX)
chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
}