diff options
| author | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-12-30 22:16:23 +0530 |
|---|---|---|
| committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2014-01-11 16:51:41 +0530 |
| commit | 9f4322fd2281d9736b9fd208a5e2ecaec49e21e0 (patch) | |
| tree | abeb3b311527b22b8a32097fe499ddbdcc88f2e4 /drivers/mtd/spi/sf_ops.c | |
| parent | 5bb30f1a40697e90945e6b80b9517bc7d44b94cb (diff) | |
sf: Divide flash register ops from QEB code
QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'drivers/mtd/spi/sf_ops.c')
| -rw-r--r-- | drivers/mtd/spi/sf_ops.c | 75 |
1 files changed, 26 insertions, 49 deletions
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 05fbcbd43d0..28527fa829b 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -24,94 +24,71 @@ static void spi_flash_addr(u32 addr, u8 *cmd) cmd[3] = addr >> 0; } -int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) +int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs) { - u8 cmd; int ret; + u8 cmd; - cmd = CMD_WRITE_STATUS; - ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1); + cmd = CMD_READ_STATUS; + ret = spi_flash_read_common(flash, &cmd, 1, rs, 1); if (ret < 0) { - debug("SF: fail to write status register\n"); + debug("SF: fail to read status register\n"); return ret; } return 0; } -#ifdef CONFIG_SPI_FLASH_MACRONIX -int spi_flash_set_qeb_mxic(struct spi_flash *flash) +int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) { - u8 qeb_status; u8 cmd; int ret; - cmd = CMD_READ_STATUS; - ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1); + cmd = CMD_WRITE_STATUS; + ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1); if (ret < 0) { - debug("SF: fail to read status register\n"); + debug("SF: fail to write status register\n"); return ret; } - if (qeb_status & STATUS_QEB_MXIC) { - debug("SF: Quad enable bit is already set\n"); - } else { - ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); - if (ret < 0) - return ret; - } - - return ret; + return 0; } -#endif #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) -static int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr) +int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc) { - u8 data[2]; - u8 cmd; int ret; + u8 cmd; - cmd = CMD_READ_STATUS; - ret = spi_flash_read_common(flash, &cmd, 1, &data[0], 1); + cmd = CMD_READ_CONFIG; + ret = spi_flash_read_common(flash, &cmd, 1, rc, 1); if (ret < 0) { - debug("SF: fail to read status register\n"); - return ret; - } - - cmd = CMD_WRITE_STATUS; - data[1] = cr; - ret = spi_flash_write_common(flash, &cmd, 1, &data, 2); - if (ret) { - debug("SF: fail to write config register\n"); + debug("SF: fail to read config register\n"); return ret; } return 0; } -int spi_flash_set_qeb_winspan(struct spi_flash *flash) +int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc) { - u8 qeb_status; + u8 data[2]; u8 cmd; int ret; - cmd = CMD_READ_CONFIG; - ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1); - if (ret < 0) { - debug("SF: fail to read config register\n"); + ret = spi_flash_cmd_read_status(flash, &data[0]); + if (ret < 0) return ret; - } - if (qeb_status & STATUS_QEB_WINSPAN) { - debug("SF: Quad enable bit is already set\n"); - } else { - ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); - if (ret < 0) - return ret; + cmd = CMD_WRITE_STATUS; + data[1] = wc; + ret = spi_flash_write_common(flash, &cmd, 1, &data, 2); + if (ret) { + debug("SF: fail to write config register\n"); + return ret; } - return ret; + return 0; } #endif |