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authorTom Rini <trini@konsulko.com>2023-11-07 10:36:23 -0500
committerTom Rini <trini@konsulko.com>2023-11-07 10:36:23 -0500
commite17d174773e9ba9447596708e702b7382e47a6cf (patch)
treeef27022ead88cb3d66df0eeed8df06035d223b80 /drivers/mtd/spi/spi-nor-core.c
parent37229edccca13ea47e44865aaafd17890f9148b2 (diff)
parent37f500d711ec1f6b25189c1f6022ffe5e70a38ab (diff)
Merge tag 'xilinx-for-v2024.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.01-rc3 xilinx: - Disable lock in mini spi configurations zynq: - DTS syncups - Kconfig updates zynqmp: - DTS syncups - Kconfig fixups versal: - Make 30MHz as default freq for spi versal net: - Enable ADMA for mmc serial: - Read baudrate from DT spi: - Put spi lock under one Kconfig - Support 64bit addresses in cadance_ospi - zynqmp_gqspi - change logging support firmware: - Handle errors in zynqmp_pm_feature() include: - Sync vsc8531 dt binding with kernel
Diffstat (limited to 'drivers/mtd/spi/spi-nor-core.c')
-rw-r--r--drivers/mtd/spi/spi-nor-core.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index db20feb4dae..9a1801ba93d 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1100,6 +1100,7 @@ static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr,
}
#endif
+#if defined(CONFIG_SPI_FLASH_LOCK)
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
/* Write status register and ensure bits in mask match written values */
static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
@@ -1387,6 +1388,7 @@ static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len)
return stm_is_unlocked_sr(nor, ofs, len, status);
}
#endif /* CONFIG_SPI_FLASH_STMICRO */
+#endif
static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
{
@@ -1462,6 +1464,7 @@ read_err:
return ret;
}
+#if defined(CONFIG_SPI_FLASH_LOCK)
#ifdef CONFIG_SPI_FLASH_SST
/*
* sst26 flash series has its own block protection implementation:
@@ -1730,6 +1733,8 @@ sst_write_err:
return ret;
}
#endif
+#endif
+
/*
* Write an address range to the nor chip. Data must be written in
* FLASH_PAGESIZE chunks. The address range may be any size provided
@@ -4104,6 +4109,7 @@ int spi_nor_scan(struct spi_nor *nor)
mtd->_read = spi_nor_read;
mtd->_write = spi_nor_write;
+#if defined(CONFIG_SPI_FLASH_LOCK)
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
/* NOR protection support for STmicro/Micron chips and similar */
if (JEDEC_MFR(info) == SNOR_MFR_ST ||
@@ -4127,7 +4133,7 @@ int spi_nor_scan(struct spi_nor *nor)
nor->flash_is_unlocked = sst26_is_unlocked;
}
#endif
-
+#endif
if (info->flags & USE_FSR)
nor->flags |= SNOR_F_USE_FSR;
if (info->flags & SPI_NOR_HAS_TB)