diff options
| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2023-07-04 19:13:20 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-07-06 17:28:08 +0800 |
| commit | bc35b49a5c12891d969e28dbf29024ca664dea8b (patch) | |
| tree | 9b3ef41d80f6bdc93586996f987597035fe2d0ea /drivers/net/dwc_eth_qos.c | |
| parent | 9eb0fc24c9804118e44b70851b1ad03aa1fc8cd4 (diff) | |
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.
This patch also updates the information about PLICSW.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'drivers/net/dwc_eth_qos.c')
0 files changed, 0 insertions, 0 deletions