Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.07-rc1

microblaze:
- Add support for reserved memory

xilinx:
- Update FRU code with MAC reading

zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0

zynq:
- Update nand binding

nand:
- Aligned zynq_nand to upstream DT binding

net:
- Add support for ethernet-phy-id

mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs

gpio:
- Add driver for slg7xl45106

firmware:
- Add support for dynamic SD config

power-domain:
- Update zynqmp driver with the latest firmware

video:
- Add skeleton driver for DP and DPDMA

i2c:
- Fix i2c to work with QEMU

pinctrl:
- Add driver for zynqmp pinctrl driver

1 files changed, 69 insertions, 0 deletions

diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c
new file mode 100644
index 00000000000..5617ac3ad62
--- /dev/null
+++ b/drivers/net/phy/ethernet_id.c
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ethernet phy reset driver
+ *
+ * Copyright (C) 2022 Xilinx, Inc.
+ */
+
+#include <common.h>
+#include <dm/device_compat.h>
+#include <phy.h>
+#include <linux/delay.h>
+#include <asm/gpio.h>
+
+struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
+				      phy_interface_t interface)
+{
+	struct phy_device *phydev;
+	struct ofnode_phandle_args phandle_args;
+	struct gpio_desc gpio;
+	ofnode node;
+	u32 id, assert, deassert;
+	u16 vendor, device;
+	int ret;
+
+	if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+				       &phandle_args))
+		return NULL;
+
+	if (!ofnode_valid(phandle_args.node))
+		return NULL;
+
+	node = phandle_args.node;
+
+	ret = ofnode_read_eth_phy_id(node, &vendor, &device);
+	if (ret) {
+		dev_err(dev, "Failed to read eth PHY id, err: %d\n", ret);
+		return NULL;
+	}
+
+	ret = gpio_request_by_name_nodev(node, "reset-gpios", 0, &gpio,
+					 GPIOD_ACTIVE_LOW);
+	if (!ret) {
+		assert = ofnode_read_u32_default(node, "reset-assert-us", 0);
+		deassert = ofnode_read_u32_default(node,
+						   "reset-deassert-us", 0);
+		ret = dm_gpio_set_value(&gpio, 1);
+		if (ret) {
+			dev_err(dev, "Failed assert gpio, err: %d\n", ret);
+			return NULL;
+		}
+
+		udelay(assert);
+
+		ret = dm_gpio_set_value(&gpio, 0);
+		if (ret) {
+			dev_err(dev, "Failed deassert gpio, err: %d\n", ret);
+			return NULL;
+		}
+
+		udelay(deassert);
+	}
+
+	id =  vendor << 16 | device;
+	phydev = phy_device_create(bus, 0, id, false, interface);
+	if (phydev)
+		phydev->node = node;
+
+	return phydev;
+}