diff options
| author | Tom Rini <trini@konsulko.com> | 2021-06-18 11:18:56 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-06-18 11:18:56 -0400 |
| commit | 97c8cb524c19f054036efd2b4429273bd503e39c (patch) | |
| tree | 3cdea4854ba0e8755aff49c43579eb2756ff3349 /drivers/net/sun8i_emac.c | |
| parent | a298d4fbcdba1b38e48ea2af0fc5386cab2070da (diff) | |
| parent | 54c321f9deeba309989f0828e4d0427cbfbefcd3 (diff) | |
Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net
Diffstat (limited to 'drivers/net/sun8i_emac.c')
| -rw-r--r-- | drivers/net/sun8i_emac.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 5a1b38bf80f..d7553fe1634 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_BUSY; @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg, * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_WRITE; mii_cmd |= MDIO_CMD_MII_BUSY; |